Secure hash functions, such as Message Digest version 5 (MD5), Secure Hash Algorithm 1 (SHA-1) and SHA-2 family of hash functions, including SHA-224, SHA-256, SHA-384 and SHA 512, have certain desirable attributes. For example, the hash functions are one-way, the chances of a collision are low, and the hash value changes drastically for even minor file alterations. The one-way feature means that it is exceptionally unlikely that the contents of a file could be recreated using only the hash value. The low chance of a collision means that it is unlikely that two different files could produce the same value. Drastic changes in the hash value, for even minor alterations, make any alteration, even the slightest, easily detectable.
The secure hash functions are used to process messages to produce message digests. The functions enable the determination of message integrity and are widely used in generation and verification of digital signatures, message authentication codes (MACs), and key exchange mechanisms (KEMs).
Each function has two stages: preprocessing and hash computation. Preprocessing involves padding a message, parsing the padded message into blocks, and setting initialization values. Preprocessing does not require laborious computations. Hash computation successively processes blocks of the padded message and generates a series of hash values. A final hash value generated by the hash computation is used to determine the message digest. The hash computation involves hard computations.
Certain applications require very fast implementation of the secure hash techniques. Currently, only a hardware implementation of the hash computation stage can meet the throughput requirements in such applications. An efficient hardware implementation is one that allows a message block to be processed in an acceptable time and preferably at low-cost.
The throughput of a scheme computation can be evaluated based on the scheme depth, i.e., the number of logic cells in the longest path from scheme input (or flip-flop output) to scheme output (or flip-flop input). The logical basis of the scheme computation can include AND, OR and NOT cells. NOT cells are not considered during depth computation. Low depth of the scheme allows production of a high-frequency hardware design for the scheme. If the scheme depth is too high, the high-frequency implementation is not possible.
The throughput of the scheme that implements the hash computation stage depends on the target frequency and number of time units (i.e., clock cycles) utilized to process one message block. The rough estimate of the scheme cost can be based on the number of logic cells and memory units (flip-flops) used: the higher the number of used cells and flip-flops is, the higher is the cost. Hence, cost reduction is roughly equivalent to the reduction of the scheme area that generally also grows with the growth of the number of used cells and registers.